The SMI is a high level interrupt which interrupts the normal program execution and invokes an SMM (System Management Mode) The SMI is normally but not exclusively used for power management in a processor or for workarounds. Upon a processor receiving an SMI on a pin generally designated for receiving an SMI, for example, an SMI# pin, the processor waits for all pending bus cycles to be completed and then asserts an SMIACT# (System Management Interrupt Active) signal, thereby entering the SMM mode and enabling a memory to allow the processor to save its state (context) in the memory. The processor, after saving its state in the memory and switching to the SMM processor environment, then jumps to a predetermined address in the memory to execute a previously stored SMI handler which performs the necessary system management activities. After the necessary system management activities have been performed, the SMI handler executes an instruction which restores the processor's state from the memory, deasserts the SMIACT# signal and then returns control to the previously interrupted program which was being executed by the processor.